| TITLE | High Speed Area Efficient VLSI Architecture for DCT using Proposed CORDIC Algorithm |
|---|---|
| AUTHOR | DEEPNARAYAN SINHA, PRASHANT CHATURVEDI, DR. RITA JAIN |
| PUBLICATION DATE | 2023-02-04 |
| VOLUME | 4 |
| ISSUE | 2 |
| 2_IJARASEM.pdf |
Copyright@IJARASEM